# Applied ML Director (Technical Team Lead) Source: https://realanalystjobs.com/job/applied-ml-director-technical-team-lead-cadence-design-systems-703cfeed Applied ML Director (Technical Team Lead) at Cadence Design Systems, an on-site role based in San Jose, California, USA. Pay stated in the posting: $178,500 to $331,500. Posted on 7 August 2026, read from Cadence Design Systems' own careers page (Workday), which RealAnalystJobs re-checks daily and removes the role when it closes. Cadence Design Systems has approved H-1B petitions on USCIS record (employer-wide, not a promise for this role). Updated 15 November 2026. ## Key facts - Company: [Cadence Design Systems](https://realanalystjobs.com/companies/cadence-design-systems) - Location: San Jose, California, USA - Work mode: On-site - Pay stated in the posting: $178,500 to $331,500 - Posted: Aug 7, 2026 - Employment type: Full time - Source: Cadence Design Systems' careers page (Workday), re-checked daily ## Visa sponsorship The posting does not say. Cadence Design Systems had H-1B petitions approved for 333 workers in fiscal year 2026 (USCIS). That is history, not a promise for this role. [See the record](https://realanalystjobs.com/companies/cadence-design-systems#h1b-record) ## About this role At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. About Us Chips are at the center of today's tech-driven world. But how we design and verify them has not fundamentally changed in decades, while their complexity and specialization have skyrocketed due to increasing performance demands from AI. We are a dynamic, fast-moving team of software developers, ML scientists, and research-minded engineers on a mission to change that. Operating with the agility of a startup but backed by industry-leading verification technologies, we are part of the System Verification Group (SVG). Our charter is to develop state-of-the-art EDA software and hardware platforms (including Xcelium , Jasper, Palladium, Protium, and Helium) and supercharge them with cutting-edge AI, automation, and advanced data-driven workflows. About This Role Cadence Design Systems is the leading provider of design automation tools for electronic and intelligent systems design. As the Applied ML Director for the ChipStack SuperAgent Team, you will lead a highly technical group of ML and software engineers responsible for designing, implementing, and evaluating AI agents that enhance productivity across the semiconductor design lifecycle. This is a true "player-coach" role. You will act as the technical backbone of the team - deeply hands-on with architecture, system design, and coding - while concurrently managing, mentoring, and scaling the engineering team. You will drive the technical roadmap for our agent infrastructure, evaluation systems, and production-grade AI capabilities integrated within Cadence’s EDA ecosystem. The ideal candidate pairs seasoned engineering leadership with practical, in-the-weeds experience building scalable ML systems and agentic workflows. Responsibilities • Lead & Mentor: Manage and grow a high-performing team of ML and software engineers. Foster a culture of technical excellence, continuous learning, and rapid execution. • Hands-On Technical Leadership: Drive the technical vision and actively contribute to the codebase. Design, implement, and review scalable infrastructure for AI agents within the ChipStack SuperAgent ecosystem. • Architect Production AI: Guide the development of robust evaluation frameworks, data pipelines, retrieval systems (RAG), and context-engineering strategies to ensure consistent, grounded, and aligned agent behavior. • Operational Excellence: Oversee continuous integration, automated testing, and observability systems. Make high-level architectural decisions to optimize system performance across latency, cost, reliability, and scalability. • Cross-Functional Collaboration: Partner with product management, research, and core engineering teams to align the AI roadmap with overarching EDA platform goals. Required Qualifications • Education: MS or PhD in Computer Science, Computer Engineering, or a related technical field. • Leadership Experience: 3+ years of direct engineering management or formal technical lead experience, with a proven track record of successfully mentoring engineers and delivering complex projects. • Engineering Fundamentals: 7+ years of hands-on software engineering and ML experience. You must possess deep expertise in design, refactoring, debugging, and testing distributed systems - and you should still be comfortable writing production-quality code today. • LLM Expertise: Deep understanding of large language models (LLMs) and the practical realities of deploying them in production (latency, cost, reliability, monitoring, and failure analysis). • System Evaluation: Experience designing rigorous evaluation frameworks for AI systems, including benchmarking and regression testing. Skills of Interest • Agent Architecture: Hands-on experience with reason - act loops, planning/self-correction patterns, tool/function calling, persistent memory systems, and structured outputs. • LLM Engineering: Familiarity with frontier LLMs and trade-offs across model families; practical experience with prompt engineering, context management, and model alignment techniques. • Retrieval & Data Systems: Deep understanding of RAG pipelines, embeddings, indexing strategies, chunking methodologies, and grounding techniques. • Infrastructure & Observability: Experience building logging, tracing, monitoring, and evaluation systems specifically tailored for ML/AI applications. • Domain Interest: A strong interest in semiconductor design, EDA workflows, and high-performance computing environments (prior EDA experience is a plus, but not required ). Our Culture • Challenge the status quo: We are innovators who challenge industry norms and push forward our vision of how silicon should be built. • Strong opinions, loosely held: We are low on ego, but high on collaboration. We are okay to be wrong and are always open to learning. • Ship fast, ship quality: We ruthlessly prioritize what matters. We build at lightning speed, but never compromise on the high standards required by the semiconductor industry. • Proud of our craft: Attention to detail is in our DNA. We take pride in what we build and go the extra mile to ensure an exceptional experience for our users. The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t. Description from Cadence Design Systems' public careers feed, reproduced so you can read the role here. Apply on the company's own site; Real Analyst Jobs never submits anything for you. ## How to apply Open [this role on Real Analyst Jobs](https://realanalystjobs.com/job/applied-ml-director-technical-team-lead-cadence-design-systems-703cfeed) and use Apply now there to reach the employer's application. The listing is re-checked against Cadence Design Systems' careers page daily and removed when it closes. ## Cadence Design Systems 2 open analyst roles on Real Analyst Jobs. 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